A routability-driven placer for Printed Circuit Board design

by Arindam Banerjee for Portland State University

The aim of this project is to develop a routibility-driven placer that would be used as a standalone tool for autoplacing PCB components considering optimization of routability. Once the circuit design is made by PCB design tool, the design file would be imported to the placer for autoplacing the components. The final output file would be exported to the PCB tool again for further designing. This placer would be integrated with KiCAD software suite for autoplcaing the components in PCB design.