GSoC/GCI Archive
Google Summer of Code 2015 lowRISC

Porting seL4 to RISC-V

by Hesham Almatary for lowRISC

Porting seL4 microkernel to RISC-V would assert this new powerful ISA hardware capabilities, exposing bugs and allow new hardware mechanisms (thanks to the open-source hardware flexibility) to be introduced. The project aims to port the small, but powerful, seL4 microkernel to RISC-V and this is of interest to both seL4 and RISC-V communities. Moreover, it will allow software L4 microkernel developers to interact with hardware designers narrowing the gap between each other.