GSoC/GCI Archive
Google Summer of Code 2013 coreboot

Test set-up for the coreboot distributed firmware test environment featuring greater extensibility, enhanced automation, concurrent high speed firmware flashing and decentralized operation.

by Ayush Sagar for coreboot

The proposed system provides convenient and inexpensive architecture for interfacing the coreboot test server to systems under test (SUT). Each SUT has a Controller board for controlling and monitoring the SUTs and an In Circuit Programmer based on FT232H USB 2.0-Serial Bridge. A cluster of these SUTs connect to a concentrator computer based on Raspberry Pi (RasPi) board where it provides functions of flashing, controlling and monitoring of the SUTs. A large number of such clusters may exist which could be connected to a common LAN or the internet so that these concentrators can be accessed remotely from any computer via SSH and an individual SUT may then be controlled through the software within the concentrator. Programmable USB Power-strips are provided such that individual switches can be programmed by the test server to control power to the SUTs and other peripherals.